DRISI Selva is an integrated GIS and Image Processing software solution providing nearly 300 modules for the analysis and display of digital spatial information.

While the alpha compressor is one of the best, cleanest and most expensive mastering compressors out, the mpressor is its roaring mix counterpart. Both hardware compressors are not cheap devices at all, so this bundle has to considered a bargain.

Based upon some of the finest analog units out there this bundle gives you the full range of SPL plugins. Classics like the Transient Designer (a must-have for modern drum sounds!), tube equipment like the patented Vitalizer MK2-T or the TwinTube Saturation, the Passeq Mastering EQ, together with advanced modern tools like the DrumXchanger. 

We are giving away the VSC-2 hardware which we have modeled! The winner will be drawn February 29th, and every license used to that date will take part and has a chance of winning this "Mercedes of VCA compression". We also honor ALL existing customers from the Alliance webshop and the former Brainworx bx_shop, of course.

bx_ALL 2012 Bundle, one of our bundle highlights for sure. This collection contains them all... award winning "modern classics" like the bx_digtal V2, bx_hybrid or the bx_XL Mastering limiter, bx_dynEQ in mono, stereo and M/S versions, instrument mix tools like bx_boom! (drums) and bx_shredspread (guitars), plus great control listening tools and metering with bx_control V2 and bx_meter.

The ISE Design Suite: System Edition provides a comprehensive suite of integrated development environment, software tools, configuration wizards, and IP that facilitates your design and utilizes all of the flexibility offered by a programmable platform. Xilinx CORE Generator System, included in all Editions of the ISE Design Suite, accelerates design time by providing access to highly parameterized Intellectual Properties (IP) for Xilinx FPGAs and is included in the ISE Design Suite. The available user-customizable IP functions range in complexity from commonly used functions, such as memories and FIFOs, to system-level building blocks, such as filters and transforms. Using these IP blocks can save days to months of design time. The highly optimized IP allows FPGA designers to focus efforts on building designs quicker while helping bring products to market faster.